BUCKLE(OPCSDEFS)	Optical Printer Control System       BUCKLE(OPCSDEFS)

        buckle - configure the buckle input ports and bit masks

        buckle [port] [mask] [test] [0]    # (all values in hex!)

        buckle c 0000 00 00	 # No buckle detection for camera chan
        buckle c 03bd 40 40	 # LPT1 pin 10, HI bit detects condition
        buckle c 03bd 40 00	 # LPT1 pin 10, LO bit detects condition

        If your system has a buckle sensor switches on the camera, or any of
        the channels, it can be wired to one of the IBM parallel ports to allow 
        the software to sense its state, to prevent running that channel if
        the film is touching any of the buckle switches.

	Buckle conditions are tested whenever a shooting command is executed
	such as KEY, CAM, REP and SEEK. Buckle conditions are NOT tested when 
	linear movement commands such as 'GO' or 'JOG' are executed for that 
	channel, as such commands are not normally run on channels that control
	film movements.

	[port] is the port number. If [port] is 0000, no buckle 
	checking is done for that channel.

	[mask] is applied to the value received from the port 
	whenever the software is checking for a viewer open condition.
	This is applied before comparing to [test].

	[test] is compared to the value read from the port after
	[mask] is applied. If the result is the same as [test], a viewer open
	condition exists.

	It is recommended you use a separate, dedicated 5 volt power supply 
	wired through the switches in such a way that when the sensing switch
	is tripped, +5 volts is passed to the computer.

	Such a supply can be a store-bought 12 VDC transformer, with an added
	7805 5 volt regulator. Note that if you use an unregulated supply (ie.
	a transformer without the 7805), the voltage output can vary according 
	to the AC power from the wall, which normally varies plus or minus
	10 percent, causing a wide margin of possible voltages to the 
	computer's sensing input, which really wants either +5 or ground, and
	nothing else.

	As with any signal going to the sensing input on a computer, the
	signal should never be open..the signal must pull either 5 volts 
	or ground for a TRUE or FALSE condition. An open input is more like
	a radio antenna that will register both TRUE AND FALSE 
	conditions randomly, causing spurious sensing errors.

	To further prevent noise problems, use sheilded wire for the sensing
	signals, and ground the shield ONLY at the power supply end. Do NOT 
	use the sheild as a ground return for the computer..use a separate 
	conductor for signal ground. Keep wire lengths as short as possible.

	If noise problems persist, and you have ruled out a problem with the
	computer, it may be that the wire is simply too long for such a low
	voltage signal. You may want to use a higher voltage (12 volts) in
	the switch circuitry to drive an optoisolator close to the computer, 
	using the optoisolator to switch a 5 volt current to the port. 

You can find the base port value for the parallel ports from the operating system using the DOS 'debug' utility: C>debug # run 'debug' -d40:8 f # enter this (not the '-') 0040:0008 BC 03 78 03 00 00 00 00 # debug spits this out -q ----- ----- # type 'q' to quit debug | | | LPT #2's port base address | LPT #1's port base address Your machine may show different values. In the case above, 03BC is the base port value for LPT1..note the bytes are in reverse order in typical LSB/MSB fashion. See the PARALLEL() man page which shows the pin out and port addresses of the IBM PC's parallel ports. BUGS None. SEE ALSO DEENERGIZE(OPCSDEFS) - define port/bit to deenergize motors ALLSTOP(OPDSDEFS) - define port/bit to detect the allstop key BUCKLE(OPCSDEFS) - define port/bit to detect film buckles VIEWER(OPCSDEFS) - define port/bit to detect viewer open TRIPSWITCH(OPCSDEFS) - define port/bit to detect trip switches SETBIT(OPCSDEFS) - set bit(s) on a port CLRBIT(OPCSDEFS) - clear bit(s) on a port XORBIT(OPCSDEFS) - invert bit(s) on a port PARALLEL(BIOS) - parallel port pinout with port/bit masks ORIGIN Version K1.12e+ Gregory Ercolano, Venice California 04/11/98
© Copyright 1997 Greg Ercolano. All rights reserved.