CIODIO24(DOCS)		Optical Printer Control System		CIODIO24(DOCS)

NAME
    CIO-DIO24 - Docs for the CIO-DIO24 (8255 based) Digital I/O Card

DESCRIPTION
    The CIO-DIO24 is an ISA 8255 based Digital I/O card,
    available from http://www.computerboards.com/

    This board is an ISA 8255 Digital I/O board with selectable
    port base address.

CIO-DIO24 PINOUT AND SWITCH SETTINGS
	   ---------------------------------------
			  CIO-DIO24
			  Male DB37
	   ---------------------------------------

	   (LEFT ROW)              (RIGHT ROW)
	   Pin Description         Pin Description
	   --- -----------         --- -----------
	    19 GND          |\      37 A0
	    18 +5           |  \    36 A1
	    17 GND          |   |   35 A2
	    16 +12          |   |   34 A3
	    15 GND          |   |   33 A4
	    14 -12          |   |   32 A5
	    13 GND          |   |   31 A6
	    12 -5           |   |   30 A7
	    11 GND          |   |   29 B0
	    10 B0           |   |   28 B1
	     9 B1           |   |   27 B2
	     8 B2           |   |   26 B3
	     7 B3           |   |   25 B4
	     6 B4           |   |   24 B5
	     5 B5           |   |   23 B6
	     4 B6           |   |   22 B7
	     3 B7           |   |   21 GND
	     2 IR/ENA       |  /    20 +5
	     1 IR/IN        |/ 

    CIO-DIO24 DIP SWITCH (PORT BASE ADDRESS SET)
    --------------------------------------------
    Default setting is '300' for the dip switches; 9 & 8 down.
    Switches are active when in the 'down' position. 


		       9  8  7  6  5  4  3  2  1
		   .------------------------------.
		   |         _  _  _  _  _  _  _  |
		   |   |  | [_][_][_][_][_][_][ ] |
		   |   |  |  |  |  |  |  |  |  |  |
		   |  [_][_] |  |  |  |  |  |  |  |
		   |______________________________|
		       |  |  |  |  |  |  |  |  |
		       |  |  |  |  |  |  |  |  N/A
		       |  |  |  |  |  |  |  N/A
		       |  |  |  |  |  |  +80
		       |  |  |  |  |  +10
		       |  |  |  |  +20
		       |  |  |  +40
		       |  |  +80
		       |  +100
		       +200



8255 CHIP DOCS
    The following are the docs for the onboard 8255 chip.

8255 PORTS
    The 8255 family of chips (82C55, etc) are usually one chip
    solutions to getting 24 bits of programmable digital I/O.

    Typically, the chip is configured at a base I/O address, 
    such as 0310. 
    
    There are four ports (base+0, base+1, base+2 and base+3)
    that are used to control the chip:

    	base+0    - PORT #A
	base+1    - PORT #B
	base+2    - PORT #C
	base+3    - CONTROL

8255 PROGRAMMING
    The control byte controls the I/O direction of the 3 ports,
    and breaks out as follows:

        Bit   Description
	---   --------------------------------------------------
	 0    Port C (low 4 bits): 1=input, 0=output
	 1    Port B (all 8 bits): 1=input, 0=output
	 2    Mode selection: 0=MODE#0, 1=MODE#1
	 3    Port C (hi 4 bits): 1=input, 0=output
	 4    Port A (all 8 bits): 1=input, 0=output
            _
	 5   |_ 00 = MODE#0 (basic I/O)
	 6  _|  01 = MODE#1 (strobed I/O)
	        1x = MODE#2 (bidirectional bus)

	 7    Mode set flag (1=active, 0=normal)

    No initialization is 'required' to achive 24 bits of input;
    it's the default. During reset, all ports are programmed to be inputs. 
    
    Mainly, the control byte is the important factor. Here are some
    example values for the control byte:

		0x80	- A,B,C outputs
		0x9b	- A,B,C inputs
		0x92	- A+B input, C=output

8255 PROGRAMMING EXAMPLES
    Here's a C programming example that shows how to setup the 8255
    such that A+B are inputs, and C is outputs:

	/* INITIALIZATION */
	base = 0x310;
	out(base+3), 0x92;	/* A+B=in, C=out */

	/* READ/WRITE */
	a_val = inp(base+0);	/* read A */
	b_val = inp(base+1);	/* read B */
	out(base+2, c_val); 	/* write C */

   Here's an example showing a similar 8255 programming example
   in the OPCS system's HOMEDEFS.HOM file, used by the HOME program:

	# homedefs.hom
	start init_8255
	{
	    outport 0310 92
	    portset? 0310 01
	    {
	        print "Bit #1 set on port A"
	    }
	    portset? 0311 01
	    {
	        print "Bit #1 set on port B"
	    }
	    setbit 0312 01
	}
	end init_8255

8255 CHIP PINOUT
    The 82C55A is most commonly found in a 40 pin DIP.

			  82C55A
			 Top View
                       _____  _____
                      |     --     |
                PA3  [| 1       40 |]  PA4
                PA2  [| 2       39 |]  PA5
                PA1  [| 3       38 |]  PA6
                PA0  [| 4       37 |]  PA7
                 RD  [| 5       36 |]  WR
                 CS  [| 6       35 |]  RESET
                GND  [| 7       34 |]  D0
                 A1  [| 8       33 |]  D1
                 A0  [| 9       32 |]  D2
                PC7  [| 10      31 |]  D3
                PC6  [| 11      30 |]  D4
                PC5  [| 12      29 |]  D5
                PC4  [| 13      28 |]  D6
                PC0  [| 14      27 |]  D7
                PC1  [| 15      26 |]  VCC
                PC2  [| 16      25 |]  PB7
                PC3  [| 17      24 |]  PB6
                PB0  [| 18      23 |]  PB5
                PB1  [| 19      22 |]  PB4
                PB2  [| 20      21 |]  PB3
		      |____________|

8255 PORT MONITOR PROGRAM
    The OPCS software comes with 8255.exe, a program that monitors
    the realtime status of the 8255's I/O ports. Run '8255.exe'.
    This tool can be downloaded from http://seriss.com/opcs/ftp/

ORIGIN
    Gregory Ercolano, Topanga, California 04/12/00
© Copyright 1997 Greg Ercolano. All rights reserved.